1. Field of the Invention
The subject invention pertains to the field of computers and more particularly to a device for providing compatibility between a computer having a first, data bus structure and software and peripherals originally designed for use with a computer having a second different data bus structure.
2. Description of the Prior Art
A wide variety of microprocessor integrated circuits have been made by a variety of manufacturers in recent years. For various reasons, several of these microprocessor integrated circuits have become more widely used than others. Manufacturers, in order to provide the maximum compatibility between microprocessors of different generations have generally tried to retain the same or similar instruction set between various versions of their microprocessors.
One example of a microprocessor integrated circircuit in common use is the 8088 integrated circuit which is manufactured by the Intel Corporation, 3065 Bowers Avenue, Santa Clara, CA. 95051, and second sourced by others. The 8088 microprocessor integrated circuit is widely used in a variety of microcomputers and personal computers. It is, for example, used in a personal computer manufactured by International Business Machines Corp., Armonk, NY and known as the IBM PC.
The IBM PC has enjoyed a large degree of consumer acceptance and therefore a large software base has been written for it by third party software vendors. Also, a large variety of peripherals have been designed for it by third party manufacturers. In designing a new computer, many manufacturers have found it desirable to design a computer which can take full advantage of this software base and these peripherals while still incorporating advances provided by the technology available in microprocessors having the same instruction set that are faster and more powerful.
The Intel 8088 microprocessor integrated circuit, like many others, has an internal 16-bit data bus, but in order to decrease complexity, although at a concommitant loss of speed, only has 8 data lines brought external to the microprocessor. Thus, in order to provide 16-bits of data onto the internal 16-bit data bus, data must be taken serially in two successive 8-bit bytes. Since these bytes occur on successive clock pulses, there is an obvious loss of speed as compared to a microprocessor in which both bytes of a 16-bit data word are entered in parallel on one clock pulse.
An improved version of the 8088 microprocessor integrated circuit also manufactured by Intel Corporation, is the 8086 microprocessor integrated circuit. This uses the same instruction set as the 8088, but permits external access to its internal 16-bit data bus with a single 16-bit wide word. In other words, two 8-bit bytes are accessed in parallel. Additionally, both the 8086 and the 8088 can be run at a clock frequency of 5 Mhz or 8 Mhz. The above-mentioned IBM PC uses the lower frequency. Thus, it is clear that it is desirable to be able to utilize a microprocessor such as the 8086 at its maximum working clock frequency.
Heretofore, a manufacturer of a computer who wished to maintain compatibility with software and peripherals designed for the 8088 microprocessor and who also wished to obtain the greater speed available with the 8086 microprocessor, had to sacrifice a degree of compatibility with the software and peripherals available for use with the 8088 based computer. While the instruction set may have remained identical, the process in which data is moved throughout the computer's internal data bus architecture is different. Therefore, much software and most peripherals designed to work on an 8-bit data bus were adversely affected. The methods chosen to retain compatibility have been transparent to neither the software or the peripherals, or have only worked in limited cases.
Most peripherals, for example, a floppy disk controller, accept 8-bit wide data statements. This is not a problem with the 8-bit wide data bus of an integrated circuit such as the 8088. Much of the widely available software, however, writes information directly to the peripherals. Thus, such software cannot be used with a computer set up only for a 16-bit data bus using 16-bit peripherals.
A second problem arises as stated before, since the less powerful 8088 microprocessor reads instructions in successive bytes. Without some conversion, the external 16-bit data bus computer in, for example, 8086 based computers only reads from the bus to which the peripheral, such as the floppy disk controller, is connected and ignores the second or successive byte so that a portion of the 16-bit data bus, ordinarily the upper or odd portion, would receive all zeros in a write operation since there would be nothing connected to it. In a read operation, the 8086 would receive only half the information it expected.
Certain operations performed by the 8088 microprocessor require two successive bytes, while others require only a single byte. For example, the instruction MOV AX, [BX] requires two bytes to be moved between the microprocessor accumulator and the system memory addressed by BX.
In an integrated circuit such as the 8086, such a data transfer may be done in one 16-bit word operation. The data bus is arranged to have even bytes on one half of the word and odd bytes on the other. Both bytes are addressed simultaneously and in parallel.
It is also desirable to be able to utilize the full 16-bit wide capabilities of the 8086 microprocessor when it is used with devices, such as peripherals, memory expansion or other input/output devices that are designed to operate with a 16-bit wide data bus.
It is thus an object of the present invention to provide a device which permits the use of a microprocessor adapted for use with a data bus of a predetermined structure with software and peripherals designed for and compatible with a computer having a data bus of another predetermined, differing structure.
It is yet another object to provide a device which permits microprocessors adapted for use with a larger data bus to be compatible with software and peripherals having less speed and power.
It is still another object to permit a data processor adapted for use with an nm byte wide data bus to remain operable with devices designed for an nm byte wide data bus, while retaining compatibility with devices designed for an m byte wide data bus.
These and other objects of the invention will become more apparent upon reference to the following specification and the annexed drawings.